High-level and hierarchical test sequence generation
نویسندگان
چکیده
Test generation at the gate-level produces high-quality tests but is computationally expensive in the case of large systems. Recently, several research efforts have investigated the possibility of devising test generation methods and tools to work on high-level descriptions. The goal of these methods is to provide the designers with testability information and test sequences in the early design stages. The cost for generating test sequences in the high abstraction levels is often lower than that for generating test sequences at the gate-level, with comparable or even higher fault coverage. This paper first analyses several high-level fault models in order to select the most suitable one for estimating the testability of circuits by reasoning on their behavioral descriptions and for guiding the test generation process at the behavioral level. We assess then the effectiveness of high-level test generation with a simple ATPG algorithm, and present a novel highlevel hierarchical test generation approach to improve the results obtained by a pure high-level test generator.
منابع مشابه
A hierarchical test generation methodology for digital circuits
A new hierarchical modeling and test generation technique for digital circuits is presented. First, a highlevel circuit model and a bus fault model are introduced--these generalize the classical gate-level circuit model and the single-stuck-line (SSL) fault model. Faults are represented by vectors allowing many faults to be implicitly tested in parallel. This is illustrated in detail for the sp...
متن کاملHierarchical Test Generation for Digital Systems Based on Combining Bottom-Up and Top-Down Approaches
A hierarchical test generation approach for digital systems which uses register-transfer (RT) and gate level system descriptions is presented. Decision diagrams are exploited as a uniform model for describing systems at different representation levels. The method combines bottom-up and top-down approaches to make hierarchical test generation more efficient by a synergism of deterministic and ra...
متن کاملMultiple-Objective Backtrace for Solving Test Generation Constraints
Current paper presents a new method for solving hierarchical test generation constrainis. Unlike most of /he previous solvers. the proposed approach relies on the low-level model description of the constraints. The low-level model used is structurally synthesized BDDs, which are generated directly from the gate-level descriptions of the hierarchical modules. The method has been implemented and ...
متن کاملEnhancing Hierarchical Atpg with a Functional Fault Model for Multiplexers
Current paper aims at improving the test generation at registertransfer level by proposing a new functional fault model as a complement to the hierarchical model to target single-stuck at faults in hierarchical designs. Experiments on different sequential benchmarks show that the new fault model allows to significantly increase the accuracy of hierarchical test generation in comparison to tradi...
متن کاملTargeting Conditional Operations in Sequential Test Pattern Generation
The goal of the paper is to propose a set of dedicated fault models targeting single stuck-at faults in hierarchical designs. These include hierarchical fault model for Functional Units, a functional model for multiplexers and a combined hierarchical-functional fault model for conditional operations. In the paper, the new fault models have been integrated to a high-level test path activation to...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
عنوان ژورنال:
دوره شماره
صفحات -
تاریخ انتشار 2002